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SUMMARY:Securing Vulnerable Populations
DTSTART:20230614T140000
DTEND:20230614T160000
DTSTAMP:20260407T230640Z
UID:a868a8753a1aa36afc17061850c613bd92ba1572bc6cf63926d6e377
CATEGORIES:Conferences - Seminars
DESCRIPTION:Boya Wang\nEDIC candidacy exam\nExam president: Prof. Clément
  Pit-Claudel\nThesis advisor: Prof. Carmela Troncoso\nCo-examiner: Prof. B
 ryan Ford\n\nAbstract\nField Programmable Gate Arrays (FPGAs) witnessed mu
 ltiple leaps in their programmability through the development of High-Leve
 l Synthesis (HLS) tools that enabled more accessibility to non-expert user
 s of FPGAs. The current HLS tools exploit specific types of parallelism in
  the produced circuits\, like Instruction Level Parallelism  (ILP). Suppo
 rt of Task-Level Parallelism (TLP) in HLS has been recently explored on FP
 GAs with systems like ParallelXL\, TAPAS\, and TaPaSCo. This report examin
 es TLP from a software side through the Cilk runtime system. Second\, it a
 nalyzes ParallelXL\, an effort to bring TLP support to FPGAs using the pro
 gramming model from Cilk. Then\, it investigates a recent graph cycle enum
 eration algorithm that uses software TLP as a possible candidate for FPGA 
 acceleration. Finally\, the report concludes with a research proposal that
  identifies the line of research to support TLP for FPGAs.\n\nBackground p
 apers\n1. Investigating the Computer Security Practices and Needs of Journ
 alists\nhttps://www.usenix.org/system/files/conference/usenixsecurity15/se
 c15-paper-mcgregor.pdf \n\n2. SoK: Making Sense of Censorship Resistance 
 Systems\nhttps://murdoch.is/papers/popets16makingsense.pdf \n\n3. A Decen
 tralised and Encrypted National Gun Registry\nhttps://ieeexplore.ieee.org/
 abstract/document/9519474 \n 
LOCATION:BC 410 https://plan.epfl.ch/?room==BC%20410
STATUS:CONFIRMED
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