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SUMMARY:Prof. Luca Carloni of Columbia: Agile and Collaborative System-on-
 Chip Design with Open-Source Hardware Platforms
DTSTART:20260417T111500
DTEND:20260417T121500
DTSTAMP:20260416T051106Z
UID:9d0426c5f56c80bfa4b65251b1a8633cdd5de30c6a8d0959fe036a99
CATEGORIES:Conferences - Seminars
DESCRIPTION:Luca Carloni is professor and chair of Computer Science at Col
 umbia University in the City of New York. He holds a Laurea Degree Summa c
 um Laude in Electronics Engineering from the University of Bologna\, Italy
 \, and an MS in Engineering and a PhD in Electrical Engineering and Comput
 er Sciences\, both from the University of California\, Berkeley. His resea
 rch interests include heterogeneous computing\, system-on-chip platforms\,
  embedded systems\, and open-source hardware. He co-authored over two hund
 red refereed papers. Luca received the NSF CAREER Award\, the Alfred P. Sl
 oan Research Fellowship\, and the ONR Young Investigator Award. In 2025\, 
 he received the IEEE/ACM A. Richard Newton Technical Impact Award in Elect
 ronic Design Automation for the paper "Latency-Insensitive Protocols" and 
 the Columbia Engineering School (SEAS) Alumni Distinguished Faculty Teachi
 ng Award. He is an ACM Fellow and an IEEE Fellow.\nOpen-source hardware ca
 n play a unique role for the semiconductor industry in the age of sustaina
 ble AI. It can enable design reuse\, foster collaboration\, and support wo
 rkforce development. ESP (Embedded Scalable Platforms) is an open-source r
 esearch platform for system-on-chip (SoC) design that combines a modular a
 rchitecture with an agile design methodology. The ESP architecture simplif
 ies the design and prototyping of heterogeneous chips with multiple RISC-V
  processor cores and dozens of loosely coupled accelerators\, all intercon
 nected by a scalable network-on-chip. The ESP methodology promotes system-
 level design while accommodating different specification languages and des
 ign flows.\n\nESP's capabilities have enabled a small team\, primarily com
 posed of graduate students\, to realize two SoCs of increasing complexity\
 , each within a few months. Conceived as a heterogeneous system integratio
 n platform and refined through years of teaching at Columbia University\, 
 ESP is well suited to advance collaborative engineering across the open-so
 urce hardware community.\n\nThis talk will be followed by a standing lunch
  in BC420 from 12:15 to 13:30.
LOCATION:BC420 https://plan.epfl.ch/?room=BC420
STATUS:CONFIRMED
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