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SUMMARY:System Seminar : Integrating a distributed memory computer on a ch
 ip: challenges and opportunities
DTSTART:20130107T161500
DTEND:20130107T173000
DTSTAMP:20260407T152649Z
UID:5845f423cb789aa00bde94c38af065faac0c8ed2b00027b76c94928d
CATEGORIES:Conferences - Seminars
DESCRIPTION:Benoit Dupont de Dinechin\, Kalray Corporation\nAbstract\nThre
 e architectural approaches for the integration of processors with hundreds
  of cores into a single chip have been successfully implemented: the gener
 al-purpose GPU architecture\, as exemplified by the NVIDIA Fermi architect
 ure\, the shared memory manycores represented by the Tilera and the Intel 
 MIC architectures and the distributed memory manycores as experimented wit
 h the Intel Single Chip Cloud Computer\, and now realized by the Kalray MP
 PA256 manycore processor.\nIntegrating a distributed memory supercomputer 
 architecture on a chip is primarily motivated by scalability requirements.
  Accordingly\, the Kalray MPPA256 manycore processor implements a distribu
 ted memory architecture similar to those of high-end supercomputers\, wher
 e compute nodes of 17 SMP cores each\, and I/O subsystems of 4 SMP cores e
 ach\, are connected by specialized networks-on-chip.\nBased on the experie
 nce of designing the Kalray MPPA256 processor and implementing its program
 ming models\, we present the new opportunities and challenges brought by t
 he on-chip integration of a distributed memory supercomputer architecture 
 both in hardware and in software.\nBiography\nBenoit Dupont de Dinechin is
  currently the Director of Software Development at Kalray (http://www.kalr
 ay.eu)\, a company that manufactures integrated manycore processors  for 
 embedded and industrial applications. He is also the Kalray VLIW core main
  architect\, and co-architect of the Kalray Multi Purpose Processing Array
  (MPPA). Before joining Kalray\, Benoit Dupont de Dinechin was in charge o
 f Research and Development in the STMicroelectronics Software\, Tools\,Ser
 vices division\, with special focus on compiler design\, virtual machines 
 for embedded systems\, and component-based software development frameworks
 . He was promoted to STMicroelectronics National Fellow in 2008. Prior to 
 his work at STMicroelectronics\, Benoit Dupont de Dinechin held a position
  at the applied mathematics department of the military branch of the Frenc
 h Atomic Energy Commission (CEA). In this position\, he worked part-time a
 t the Cray Research park (Minnesota)\, where he developed the software pip
 eliner of the Cray T3D production compilers. Benoit Dupont de Dinechin ear
 ned an engineering degree in Radar and Telecommunications from the Ecole N
 ationale Superieure de l'Aeronautique et de l'Espace (Toulouse\, France)\,
  and a doctoral degree in computer systems from the University Pierre et M
 arie Curie (Paris) under the direction of Prof. P. Feautrier. He completed
  his post-doctoral studies at the McGill university (Montreal\, Canada) at
  the ACAPS laboratory led by Prof. G. R. Gao.
LOCATION:BC 420 https://plan.epfl.ch/?room==BC%20420
STATUS:CONFIRMED
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