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SUMMARY:Design tradeoffs of approximate analog neural accelerators
DTSTART:20130125T123000
DTEND:20130125T140000
DTSTAMP:20260427T202649Z
UID:80aa4970c93ad966b39516ba662159973d83f9776c707107a03dbcc3
CATEGORIES:Conferences - Seminars
DESCRIPTION:Renée St.Amant\nAbstract:\nAn increased focus on energy effic
 iency\, coupled with increasingly less reliable hardware behavior due to t
 ransistor scaling\, has motivated research in the use of approximate  com
 puting to gain efficiency when precise operation is not required. Prior wo
 rk has proposed an approach to translate general-purpose\, approximation-t
 olerant program segments to neural networks for acceleration\, exploiting 
 opportunities for energy efficiency through techniques that compromise acc
 uracy. As analog circuits traditionally trade accuracy for efficiency\, an
 d therefore exhibit high potential\, we explore their application to a neu
 ral accelerator in the context of enabling the efficient acceleration of g
 eneral-purpose\, approximate code. We discuss the opportunities\, challeng
 es\, and tradeoffs that are unique to an analog approach\, while defining 
 two major design components to consider: value representation\, including 
 bit-width selection\, and compute unit configuration.Bio:\nRenée St. Aman
 t is a Ph.D. candidate in the Computer Sciences Department at the Universi
 ty of Texas at Austin\, working under the supervision of Doug Burger. Her 
 research interests are in the area of computer architecture and include mi
 xed-signal microarchitecture design\, approximate computing\, and memory t
 echnologies. Her current work aims to enable emerging applications through
  mixed-signal design for energy-efficient\, approximate computation.
LOCATION:BC 420 https://plan.epfl.ch/?room==BC%20420
STATUS:CONFIRMED
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