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SUMMARY:Hardware Security in Nanometer CMOS
DTSTART:20110622T140000
DTSTAMP:20260408T010940Z
UID:95c5fe038d64090721569bb3fbe3c99c336bf09af9cd647a32907ab9
CATEGORIES:Conferences - Seminars
DESCRIPTION:Prof. Wayne Burleson\, Uni. of Massachusetts \nAs computer sys
 tems become ubiquitous\, security concerns are paramount. Security systems
  are typically heavily layered but ultimately rely on low-level hardware p
 rimitives and assumptions. Lightweight applications such as RFID\, Smart c
 ards and Smart dust require very lightweight security primitives that can 
 withstand a range of attacks. In this talk\, we explore the design of very
  lightweight True Random Number Generators and Chip Identification circuit
 s in CMOS technologies at 45nm and below. We also show side-channel vulner
 abilities that arise in advanced CMOS technologies due to process variatio
 n and noise. Some existing countermeasures are shown to be weak in advance
 d technologies\, and new countermeasures are proposed. We will discuss har
 dware Trojans and their potential impact on semiconductor security. Finall
 y\, we will discuss applications in Transportation Payment Systems and Imp
 lantable Medical Devices\, among others. This work is supported by NSF\, S
 RC\, Intel and Cisco and also gives insight into methods for statistical d
 esign beyond security. 
LOCATION:SG 0211 https://plan.epfl.ch/?room==SG%0200211
STATUS:CONFIRMED
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