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SUMMARY:Tools for Exploration of Silicon Photonic Network Designs
DTSTART:20130807T100000
DTSTAMP:20260506T061823Z
UID:8ba03e821d5cf7ce822f3bacf6999316e120877bbd3cbafc17e9f325
CATEGORIES:Conferences - Seminars
DESCRIPTION:Dr. Sébastien Rumley\, Columbia University\nBio: Sébastien R
 umley received his M.S. and PhD degrees from EPFL in 2005 and 2011 respect
 ively. In his PhD thesis\, entitled “Software Framework for Integrated M
 odelling and Dimensioning of Backbone Optical Networks”\, he studied the
  requirements for software tools and functionalities in the context of lon
 g-haul optical network planning. He identified several concepts and techni
 ques permitting to both develop and use home-brew software more efficientl
 y. Since 2012\, he is post-doctoral researcher in the Lightwave Research L
 aboratory\, at Columbia University\, New York. He applies his techniques i
 n the context of modelling and simulation of silicon photonics enabled HPC
  systems.\nInterconnects have become crucial components of High Performanc
 e Computing systems (HPC). Their power consumption\, which roughly increas
 es with computing system size\, may be a main limiting factor for HPCs. In
 tegrated Silicon Photonics (SiP) can help to avoid this scenario and conti
 nue the progression of computing power toward and beyond Exaflop scales. S
 iP links can reach very high bandwidth density and low power compared to e
 lectronic solutions. Moreover\, unlike other optical technologies\, this p
 hotonic platform can be incorporated on the same silicon die\, i.e. very c
 lose to the computing resources. SiP links and networks\, however\, are no
 t one-to-one replacements for electronic interconnects. As a result\, the 
 integration of silicon photonics into computing systems requires system-wi
 de and application/algorithm redesign. This task calls for a set of modeli
 ng and simulation tools to realize the development and design exploration 
 of SiP network architectures. In this seminar\, we review our approach to 
 fulfil these software requirements in enabling SiP-based interconnects.
LOCATION:ELE111
STATUS:CONFIRMED
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