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SUMMARY:Saving DVFS: Software Decoupled Access-Execute
DTSTART:20140620T100000
DTSTAMP:20260409T082127Z
UID:35e377d4f91c3acc71b5fbdd725923e8548ec52a59aed1fa105fa55d
CATEGORIES:Conferences - Seminars
DESCRIPTION:Stefanos Kaxiras\, Uppsala University\, Sweden\nThe end of Den
 nard scaling is expected to shrink the range of DVFS in\nfuture nodes\, li
 miting the energy savings of this technique. This work\nevaluates how much
  we can increase the effectiveness of DVFS by using a\nsoftware decoupled 
 access-execute approach. Decoupling the data access\nfrom execution allows
  us to apply optimal voltage-frequency selection\nfor each phase and there
 fore improve energy efficiency over standard\ncoupled execution.\nThe unde
 rlying insight of our work is that by decoupling access and\nexecute we ca
 n take advantage of the memory-bound nature of the access\nphase and the c
 ompute-bound nature of the execute phase to optimize\npower efficiency\, w
 hile maintaining good performance. To demonstrate\nthis we built a task ba
 sed parallel execution infrastructure consisting\nof a runtime system to o
 rchestrate the execution\, compiler\ninfrastructure to automatically conce
 rt programs to\nDecoupled-Access-Execute\, and a modeling infrastructure b
 ased on\nhardware measurements to simulate zero-latency\, per-core DVFS.\n
 Based on real hardware measurements we project that the combination of\nde
 coupled access-execute compiled programs and DVFS has the potential to\nim
 prove EDP by 25% without hurting performance. On memory-bound\napplication
 s we significantly improve performance due to increased MLP\nin the access
  phase and ILP in the execute phase. Furthermore we\ndemonstrate that our 
 method can achieve high performance both in\npresence or absence of a hard
 ware prefetcher. We are now expanding our\nwork to target serial programs 
 using a combination of compiler\ntechniques and hardware features.
LOCATION:BC 420 https://plan.epfl.ch/?room==BC%20420
STATUS:CONFIRMED
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