BEGIN:VCALENDAR
VERSION:2.0
PRODID:-//Memento EPFL//
BEGIN:VEVENT
SUMMARY:Speed/Power/Area Trade-offs for High Speed Inter Layer Data Transm
 ission in 3D Stacked ICs
DTSTART:20140826T180000
DTSTAMP:20260510T043123Z
UID:b7b14935486de21f245790d3c4a86372f16be3ca154e5477f263e4c3
CATEGORIES:Thesis defenses
DESCRIPTION:Giulia BEANATO\nThesis directors : Prof. Y. Leblebici\, Prof. 
 G. De Micheli\nMicrosystems and Microelectronics doctoral program.\nThesis
  6278
LOCATION:Auditoire CM4 http://plan.epfl.ch/?zoom=20&recenter_y=5864142.083
 08&recenter_x=730984.06221&layerNodes=fonds\,batiments\,labels\,informatio
 n\,parkings_publics\,arrets_metro\,transports_publics&floor=1&q=Auditoire_
 CM4
STATUS:CONFIRMED
END:VEVENT
END:VCALENDAR