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SUMMARY:Improving Performance with Neural Branch Prediction
DTSTART:20100826T140000
DTSTAMP:20260407T084655Z
UID:710c642af195a649a35739e5ebdcab54a00240fae5089bef6050ec0e
CATEGORIES:Conferences - Seminars
DESCRIPTION:Prof. Daniel Ángel Jiménez\nMicroprocessors achieve good per
 formance by executing many instructions in parallel.  A bottleneck is intr
 oduced when a program makes a decision using a conditional branch instruct
 ion since the processor cannot execute more instructions until it knows th
 e outcome of the decision.  To reduce this bottleneck\, microprocessors us
 e branch predictors to speculatively fetch and execute instructions beyond
  branches. The penalty of an incorrect prediction is substantial\, so impr
 oving branch predictor accuracy has the potential to significantly improve
  overall performance.  Current branch predictors use ad-hoc tables of coun
 ters to learn branch behavior from past history.  Prof. Jiménez presents 
 a highly successful line of research into improving branch predictor accur
 acy using a different aproach: neural learning.  He introduces the concept
  of neural branch prediction\, shows how to build a feasible neural branch
  predictor with low latency\, and presents a technique to overcome the tra
 ditional limitations of simple neural learning.  Neural branch predictors 
 are among the most accurate in the literature today.
LOCATION:BC 04 https://plan.epfl.ch/?room==BC%2004
STATUS:CONFIRMED
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