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SUMMARY:Beyond-Memory Applications for Memristive Nano-Crossbar Arrays
DTSTART:20141216T110000
DTSTAMP:20260408T020123Z
UID:10886195d2574de04bfa7f69b7ecd5d202809cb0e66ea51bd26e42de
CATEGORIES:Conferences - Seminars
DESCRIPTION:Eike Linn\, RWTH Aachen University\, Aachen\, Germany and Vika
 s Rana\, Forschungszentrum\, Juelich\, Germany\nCentre SI Seminar\nResisti
 ve switching devices\, also called memristive devices\, are considered one
  of the most promising candidates for future non-volatile memories. They o
 ffer an ultimate scaling potential down to 5 nm\, are suitable for passive
  crossbar arrays of minimum area (4 F2)\, and are highly compatible with c
 ommon CMOS technology for realizing hybrid circuits. By applying an approp
 riate select device at each cross-point junction\, either a rectifying ele
 ment or a complementary resistive switch (CRS)\, large-scale arrays are fe
 asible.\nComplementary Resistive Switches inherently comprise a matched se
 lector and memory device\, thus offer a highly promising approach to reali
 ze memory and logic functionality in a single device. For vertically stack
 ed TaOx-based CRS devices excellent scalability\, high endurance and low c
 urrent operation could be shown recently.\nBesides the potential as memory
 \, memristive crossbar arrays offer implementation of memory-intensive com
 puting paradigms. First\, CRS arrays enable implementation of multi-parall
 el search algorithms for pattern recognition tasks. Second\, the non-volat
 ility of the devices enables ‘stateful’ logic-in-memory operations. Th
 ese logic operations are directly processed in the memory and arithmetic t
 asks\, e.g. additions\, are carried out within the array. Thus\, by blurri
 ng the boundaries between memory and arithmetic logic units the von-Neuman
 n-bottleneck can be eased. CRS logic operations were experimentally verifi
 ed using quasi-static sweeps and pulses. Moreover\, the results were confi
 rmed by simulations using a dynamical memristive switching device models.\
 nThe availability of accurate memristive circuit models is a crucial facto
 r for further development of computing concepts for memristive arrays\, th
 us\, the detailed knowledge of the dynamic behavior of the actual resistiv
 e switch is essential. For Ag or Cu-based electrochemical metallization (E
 CM) a one-state-variable ECM model is used\, whereas for valence change me
 chanism (VCM) cells (typical materials: TiOx\, TaOx or HfOx) a more comple
 x approach is required. A three-part check for model consistency reveals t
 he limitations of over-simplistic memristor models: This simple check comp
 rises the pulse height dependency of the SET voltage\, the impact of serie
 s resistors on the low resistive state\, and the qualitative I-V behavior 
 in complementary cell configuration.\nBio: Eike Linn works for RWTH Aachen
  University\, Aachen\, Germany as research associate at Institute of Mater
 ials in Electrical Engineering and Information Technology II (IWE II). He 
 works within the framework of the Jülich Aachen Research Alliance for Fut
 ure Information Technology (JARA-FIT). He received the Diploma degree in e
 lectrical engineering from RWTH Aachen University\, Aachen\, Germany\, in 
 2006. In 2012 he received the Ph.D. degree in electrical engineering from 
 RWTH Aachen University\, Aachen\, Germany (summa cum laude). Since 2013 hi
 s work is sponsored by the German Research Foundation (DFG) under grant LI
  2416/1-1: Novel Computer-Architectural Concepts Arising from Complementar
 y Resistive Switch Enhanced Passive Crossbar Arrays. He is reviewer for se
 veral journals (IEEE EDL\, IEEE TED\, IEEE TCAS\, IEEE Nano\, IEEE TIE\, M
 icroelectron. Eng.\, Microelectron. J.\, Semicond. Sci. Technol.\, Sci. Re
 p.\, PSS\, PNAS\, Plos one\, RSC Nanoscale). In 2010 he introduced the con
 cept of complementary resistive switches (CRS) to overcome the sneak path 
 obstacle in passive crossbar arrays. His publications have been cited > 40
 0 times according to ISI web of science. His research interests include de
 velopment of new logic-in-memory and neuromorphic concepts for ReRAM-based
  crossbar array memories.\n \nVikas Rana works at Forschungszentrum\, Jue
 lich\, Germany\, as a senior scientist. He is responsible for the technolo
 gical developments for ReRAM device and integration. His current research 
 activities are focused on transition metal-oxides based nanoscale ReRAM de
 vices and integration with the advanced CMOS technology (1T-1R). He holds 
 Master of Technology degree in Solid State Physics from Indian Institute o
 f Technology\, Delhi and a Ph.D. in Electrical Engineering from Delft Univ
 ersity of Technology\, Netherlands.
LOCATION:INF328 http://plan.epfl.ch/?lang=en&room=INF328
STATUS:CONFIRMED
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