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SUMMARY:Emerging Memory/Logic Devices and Architectures\, enabled by Carbo
 n Nano-materials
DTSTART:20150324T100000
DTSTAMP:20260407T064147Z
UID:1d0afdf261c01d79576e6ba5712e0ab38cd0d2e337705f2577b38548
CATEGORIES:Conferences - Seminars
DESCRIPTION:Dr. Ethan C. Ahn\, Stanford\nBio: Chiyui (Ethan) Ahn received 
 the Ph.D. in Electrical Engineering (EE) at Stanford University in Feb. 20
 15\, working under the supervision of Professor H.-S. Philip Wong. His Ph.
 D. thesis was mainly on “Emerging Non-volatile Memory\, enabled by Carbo
 n Nano-materials.” He joined Stanford University in 2010\, after a 3-yea
 r research career on Spintronic devices (STT-MRAM) with the Korean Institu
 te of Science and Technology (KIST) in Seoul\, Korea. While at KIST\, he i
 nitiated the collaborative research program with Michigan State University
  to study spin-dependent transports in magnetic multilayers and spinvalves
 . He received the B.S. and M.S. degrees in EE from the Korean Advanced Ins
 titute of Science and Technology (KAIST) in Daejeon\, Korea. He is the aut
 hor of over 10 peer-reviewed research journal papers in electrical enginee
 ring and applied physics\, over 20 premier international conference papers
 \, and one book chapter of Emerging Nanoelectronic Devices (ed. A. Chen\, 
 John Wiley & Sons\, Ltd\, Jan. 2015). His primary research interests inclu
 de emerging non-volatile memory devices and architectures (including Metal
 -oxide RAM and Phase-Change Memory)\, beyond CMOS electronics (utilizing C
 arbon Nano-materials such as Carbon Nanotube and graphene)\, and various s
 pintronic devices (including STT-MRAM and Spin-FET). Dr. Ahn has been the 
 recipient of numerous awards and honors\, including John Bardeen Student R
 esearch Award for Excellence in Nanodevice Research (2014)\, Best Summer R
 esearch Intern Award by T.-C. Chen at IBM T. J. Watson (2013)\, and GE Sch
 olarships (since 2004).\nWith the advent of so-called ‘big data’ era a
 nd the increasing need for greater storage capacity in various mobile and 
 wearable devices\, it is becoming more important to explore a new storage-
 class memory technology. As illustrated in recent research articles and pa
 pers\, significant progress on emerging non-volatile memory (NVM) devices 
 such as spin-transfer-torque magnetic random access memory (STT-MRAM)\, re
 sistive or metal-oxide RAM (RRAM)\, or phase-change memory (PCM)\, made it
  possible to replace the mainstream NVM (NAND Flash) and even reach certai
 n on-chip memory requirements (e.g.\, L2/L3 SRAM cache). This is important
 \, as the energy efficiency of computing circuits/systems has been increas
 ingly limited by the memory and storage devices. In this talk\, a frontier
  research on the near- and long- term potential of emerging nanoscale devi
 ces and architectures will be discussed to replace ultimately scaled CMOS 
 logic and memory device technologies. The emerging 1TnR (one-transistor-n-
 resistors) array architecture with carbon nanotube field-effect transistor
  as one-dimensional selection device and thus reduced sneak leakage is dem
 onstrated as a cost-effective and 3D-stackable solution. The integrated bi
 polar RRAM device\, for example\, exhibits self-compliance characteristics
  with high endurance and fast switching speed. It is pointed out that the 
 carbon nanotube electrode brings the (lithography-free) critical dimension
  of the memory device down to a single-digit-nanometer. The novel thermal 
 engineering technique for low-power NVM applications is also introduced us
 ing a monolayer graphene as an interfacial thermal barrier. The programmin
 g (RESET) current of the graphene-inserted PCM device is reduced by about 
 30% due to an improved thermal efficiency. The status\, key challenges\, a
 nd promising applications of the RRAM\, PCM\, and STT-MRAM technologies wi
 ll be discussed in the talk\, along with the future visions of Spintronics
  and Carbon-based Electronics.
LOCATION:BM 5202 https://plan.epfl.ch/?room==BM%205202
STATUS:CONFIRMED
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