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SUMMARY: “Green” on-chip inductors in 3D ICs and their opportunistic u
 tilization: the Good\, the Bad\, and the Powerful
DTSTART:20151006T150000
DTEND:20151006T160000
DTSTAMP:20260502T001402Z
UID:571259d88a59051f9ad4f00b7d08d67108e4d96ba8d91520714826f3
CATEGORIES:Conferences - Seminars
DESCRIPTION:Dr. Yiyu Shi\, University of Notre Dame\, USA\nBio: Dr. Yiyu S
 hi is currently an associate professor in the Departments of Computer Scie
 nce and Engineering and Electrical Engineering at the University of Notre 
 Dame. He received his B.S. degree (with honors) in Electronic Engineering 
 from Tsinghua University\, Beijing\, China in 2005\, the M.S and Ph.D. deg
 ree in Electrical Engineering from the University of California\, Los Ange
 les in 2007 and 2009 respectively. He was with the Electrical and Computer
  Engineering Department at Carnegie Mellon University from Dec 2009 to Apr
 il 2010. He was then an assistant professor in the Electrical and Computer
  Engineering Department at Missouri University of Science and Technology f
 rom 2010 to 2015\, where he co-founded and co-directed the NSF I/UCRC Net-
 Centric Software and Systems Center. His current research interests includ
 e three-dimensional integrated circuits\, hardware security and renewable 
 energy applications. In recognition of his research\, seven of his papers 
 have been nominated for the Best Paper Award and one paper have received t
 he Best Paper in Track\, all in top conferences (DAC'05\, ICCAD'07\, ICCD'
 08\, ASPDAC'09\, DAC'09\, ISPD'13\, ICCAD'14\, ISPD'15). He was also the r
 ecipient of IBM Invention Achievement Award in 2009\, Japan Society for th
 e Promotion of Science (JSPS) Faculty Invitation Fellowship\, Humboldt Res
 earch Fellowship for Experienced Researchers\, IEEE St. Louis Section Outs
 tanding Educator Award\, Academy of Science (St. Louis) Innovation Award\,
  Missouri S&T Faculty Excellence Award\, National Science Foundation CAREE
 R Award\, IEEE Region 5 Outstanding Individual Achievement Award\, all in 
 2014\, and the Air Force Summer Faculty Fellowship in 2015. He has served 
 on the technical program committee of many international conferences inclu
 ding DAC\, ICCAD\, ISPD\, ASPDAC and ICCD. He is also an associate editor 
 of ACM Journal on Emerging Technologies in Computing Systems\, IEEE VLSI C
 ircuits and Systems Newsletter\, and ACM SIGDA Newsletter. He is a senior 
 member of IEEE.\nThrough-silicon-vias (TSVs) are the enabling technique fo
 r three-dimensional integrated circuits (3D ICs). However\, the large TSV 
 area\, due to process limitations\, significantly reduces the benefits of 
 3D ICs. On the other hand\, a major limiting factor of many on-chip circui
 ts (such as DC-DC converters and a resonant clock) is the large area overh
 ead induced by spiral inductors. In this talk\, we will demonstrate that i
 t is possible to utilize TSVs to form vertical inductors with a minimal fo
 otprint. We will further explain the challenges emerged with these TSV ind
 uctors\, including the lossy substrate and the constrained availability. 
  Finally\, we will present the strategies to overcome these challenges in 
 an opportunistic way.
LOCATION:INF328 http://plan.epfl.ch/?request_locale=fr&room=inf328&domain=
 places
STATUS:CONFIRMED
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