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SUMMARY:A vertical\, cross-layered approach to building low-latency applic
 ations
DTSTART:20160527T103000
DTEND:20160527T123000
DTSTAMP:20260925T054706Z
UID:2b0581f05f19ac64aaf8b7540f0bd1931e0ee0645b33ec2d9f665f08
CATEGORIES:Conferences - Seminars
DESCRIPTION:Marios Kogias\nEDIC Candidacy Exam:\nExam president:  Prof. W
 illy Zwaenepoel\nThesis Director: Prof. Christos Kozyrakis\nThesis co-dire
 ctor: Prof. Edouard Bugnion\nCo-examiner: Prof. James Larus\nBackground pa
 pers:MICA: A Holistic Approach to Fast In-Memory Key-Value StorageIX: A Pr
 otected Dataplane Operating System for High Throughput and Low LatencyDece
 ntralized Task-Aware Scheduling for Data Centre NetworksAbstract:\nBuildin
 g and deploying applications with strict latency service level objectives 
 in the scale of microseconds requires a holistic approach that includes th
 e application itself\, the operating system and the underlying networking 
 infrastructure. In this proposal I try to identify the main causes of late
 ncy variability that lead to tail-latency and I present three systems that
  tackle the low-latency challenge from a different perspective. MICA is a 
 low-latency application that introduces application specific optimizations
 . IX is a dataplane operating system\, while Barat introduces a low-latenc
 y perspective in networking. Finally\, understanding the challenge of perf
 ormance-debugging latency-critical applications and the lack of equivalent
  tooling\, I propose my research topic that is related to tools and method
 ologies around low-latency measurement.
LOCATION:INN 326 http://plan.epfl.ch/?lang=en&room=INN+326
STATUS:CONFIRMED
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