BEGIN:VCALENDAR
VERSION:2.0
PRODID:-//Memento EPFL//
BEGIN:VEVENT
SUMMARY:Parallel Architecture for High-Speed Analog-to-Digital Conversion
DTSTART:20090227T171500
DTSTAMP:20260407T105751Z
UID:7eb1c1a952256d9fa20698914a5079aca875cee164cdafb7e9da950c
CATEGORIES:Thesis defenses
DESCRIPTION:Guillaume Ding\n
LOCATION:ELA1
STATUS:CONFIRMED
END:VEVENT
END:VCALENDAR