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SUMMARY:From Microelectronics to Microsystems - the beauty of defects
DTSTART:20170124T110000
DTSTAMP:20260508T171028Z
UID:768ef435916deca1b0a9b239b4416ec01579c2449c545f00fce08ab1
CATEGORIES:Conferences - Seminars
DESCRIPTION:Prof. Jean-Pierre Raskin\, UCL\nBio: Prof. Jean-Pierre Raski
 n received the Industrial Engineer degree from the Institut Supérieur Ind
 ustriel d’Arlon\, Belgium\, in 1993\, and the M.S. and Ph.D. degrees in 
 Applied Sciences from the Université catholique de Louvain (UCL)\, Louvai
 n-la-Neuve\, Belgium\, in 1994 and 1997\, respectively. In 1998\, he joine
 d the EECS Department of The University of Michigan\, Ann Arbor\, USA. He 
 has been involved in the development and characterization of micromachinin
 g fabrication techniques for microwave and millimeter-wave circuits and mi
 croelectromechanical transducers/amplifiers working in harsh environments.
  In 2000\, he joined the Microwave Laboratory of UCL\, Louvain-la-Neuve\, 
 Belgium\, as Associate Professor\, and he has been a Full Professor since 
 2007. From September 2009 to September 2010\, he was visiting professor at
  Newcastle University\, Newcastle Upon Tyne\, UK. Since 2014 he has been t
 he head of the Electrical Engineering Department of UCL.\n\nHis research i
 nterests are the modeling\, wideband characterization and fabrication of a
 dvanced SOI MOSFETs as well as micro and nanofabrication of MEMS / NEMS se
 nsors and actuators\, including the extraction of intrinsic material prope
 rties at nanometer scale.\n\nHe was the recipient of the Médaille BLONDEL
  2015\, famous French reward that honors each year a researcher for outsta
 nding advances in science which have demonstrated a major impact in the el
 ectrical and electronics industry. He received the SOI Consortium Award in
  2016 in recognition in his vision and pioneering work for RF SOI. \nCIME
  Electron Microscopy Seminar Series\n\nLimitations of nanotechnology might
  be source of inspiration. Two scientific results highlighting the great a
 nd surprising interest of fabrication processing defects such as interface
  traps and residual stress in thin films to solve critical issues in RF CM
 OS technology and materials characterization at nanometer scale\, respecti
 vely\, will be presented. Indeed\, it has been demonstrated that the intro
 duction of defects at Si-SiO2interface drastically improves the RF perform
 ance of Si-based substrate\, while the microelectronics community tries to
  fabricate high-quality interfaces. And the great opportunity of internal 
 stress in thin films to mechanically deform nanoscale materials on-chip is
  shown whereas the MEMS community tries to get rid of the internal stress 
 in deposited thin films.\nToday\, thanks to trap-rich Silicon-on-Insulator
  (SOI) substrate\, SOI-RF has displaced III-V on switch market thanks too 
 much lower cost and better performance and opening the path for on-chip in
 tegration of full front end module.\n\nThis concept is today engineered in
  the industry\, we can cite IBM which introduces defects underneath the bu
 ried oxide of SOI substrate by high energy ions implantation\, and Soitec 
 developed the eSI™ RF-SOI substrate which has been on the market since 2
 010. Almost all new Smart Phones have RF-SOI inside. It is really a succes
 s story starting from a fundamental breakthrough developed in the academic
  environment and transferred to the industry for serving great innovative 
 products in the field of wireless communications which is one of the major
  technologies of the 21st century. In the field of material characterisat
 ion at nanometer scale\, the on-chip traction test concept is now used by
  many research labs and centers around the world to investigate mechanical
  and coupled effects in a broad range of materials including the metallic 
 glass\, semiconductors and dielectrics.
LOCATION:MXF 1 https://plan.epfl.ch/?room==MXF%201
STATUS:CONFIRMED
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