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SUMMARY:SAT-Based Logic Synthesis
DTSTART:20170612T151500
DTEND:20170612T160000
DTSTAMP:20260407T043506Z
UID:afc683b9c0790c3dcd0b4430cabbbb64080f70d1ff2777b2a61a9ac3
CATEGORIES:Conferences - Seminars
DESCRIPTION:Alan Mishchenko\, Moscow Institute of Physics and Technology\n
 This presentation focuses on the use of Boolean satisfiability as a comput
 ation engine in solving typical problems arising in logic synthesis. In pa
 rticular\, a new SAT-based algorithm is presented to compute canonical irr
 edundant sums-of-products (ISOPs) similar to Minato's well-known BDD/ZDD-b
 ased ISOP computation. In addition\, a SAT-based formulation of Boolean re
 substitution and Engineering Change Order (ECO) is presented. A practical 
 advice is given on the efficient use of SAT solvers in a variety of other 
 practical applications.\n\nBio: Alan Mishchenko graduated from Moscow Inst
 itute of Physics and Technology (Moscow\, Russia) in 1993 with MS and rece
 ived his PhD from the Glushkov Institute of Cybernetics (Kiev\, Ukraine) i
 n 1997. In 2002\, he joined the EECS Department at UC Berkeley\, where he 
 is currently a full researcher. Alan’s research interests are in develop
 ing computationally efficient methods for synthesis and verification.
LOCATION:BC 420 https://plan.epfl.ch/?room==BC%20420
STATUS:CONFIRMED
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