BEGIN:VCALENDAR
VERSION:2.0
PRODID:-//Memento EPFL//
BEGIN:VEVENT
SUMMARY:Closing the Gap between FPGA and ASIC: Balancing Flexibility and E
 fficiency
DTSTART:20120327T170000
DTSTAMP:20260413T205121Z
UID:497a794f6f50efbcb59e6496d5bd95c6d8b1c501c57bb8cbed76651c
CATEGORIES:Thesis defenses
DESCRIPTION:Monsieur Hadi Parandeh Afshar\n\nDirecteur de thèse : Prof. P
 . Ienne\nInformatique
LOCATION:MXF 1 https://plan.epfl.ch/?room==MXF%201
STATUS:CONFIRMED
END:VEVENT
END:VCALENDAR