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VERSION:2.0
PRODID:-//Memento EPFL//
BEGIN:VEVENT
SUMMARY:Global Circuit Restructuring for Efficient Hardware Synthesis
DTSTART:20120907T133000
DTSTAMP:20260406T170015Z
UID:84d37477f477c1cfa7c80632e827e4c2ca46d94e6e9358e1628c140c
CATEGORIES:Conferences - Seminars
DESCRIPTION:Ms Ana Petkovska\nEDIC Candidacy Exam:\nExam president: Prof. 
 De Micheli\nThesis director: Prof. Paolo Ienne\nCo-examiner: Prof. Aleksan
 der Madry\n\nResearch Proposal\n\nIterative Layering: Optimizing Arithmeti
 c Circuits by Structuring the Information Flow by A. K. Verma\, P. Brisk\,
  and P. Ienne.\nInterpolation and SAT-based Model Checking. by K. L. McMil
 lan\nMapping into LUT structures by S. Ray\, A. Mishchenko\, N. Een\, R. B
 rayton\, S. Jang\, and C. Chen.
LOCATION:INF113 http://plan.epfl.ch/
STATUS:CONFIRMED
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