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VERSION:2.0
PRODID:-//Memento EPFL//
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SUMMARY:FUNDAMENTALS AND RECENT ADVANCES IN POWER INTEGRITY
DTSTART:20191009T103000
DTEND:20191009T113000
DTSTAMP:20260919T215532Z
UID:32c7039b4fe52dc2e1aacce55ff1f562e7e21e937152ae0b573d5e14
CATEGORIES:Conferences - Seminars
DESCRIPTION:Ihsan Erdin received the M. Sc. degree from Middle East Tech. 
 U\, Ankara\, Turkey in 1993 and the Ph.D. degree from Carleton University 
 in 2001\, both in electrical engineering. From 1995 to 1996\, he was a res
 earch fellow at Defense Research Development (DRDC) Ottawa. From 2000 to 2
 007\, he worked as an SI/PI engineer at Nortel. Since 2007\, he has been w
 orking in the same job function at Celestica Engineering Design Services i
 n Ottawa. He is an adjunct faculty member at the Electronics Department of
  Carleton University since 2007. Dr. Erdin is a member of the Professional
  Engineers Ontario and a senior member of IEEE. He also serves as a member
  of Signal and Power Integrity Technical Committee (TC-10) of EMC Society.
   He has published over 40 technical papers in peer-refereed journals and
  conference proceedings with a focus on electromagnetic analysis methods o
 f printed circuits and multichip modules.\nAlthough signal and power integ
 rity practices are as old as the digital design itself\, unlike SI\, PI st
 ill remains an elusive concept in the eyes of industrial circles. One reas
 on is the cause-and-effect relation in PI analysis hasn’t been firmly es
 tablished in practical applications. For example\, with SI analysis\, a lo
 gic failure can be traced to a noise threshold violation. PI analysis\, on
  the other hand\, hardly points out to a smoking gun with the same rigor. 
 Starting from a qualitative and descriptive introduction of power noise fu
 ndamentals\, the current analysis techniques for printed circuit structure
 s will be reviewed and their limitations will be discussed with practical 
 workarounds. Some recent developments including a novel interpretation of 
 the effective radius of a decoupling capacitor and multipin optimization o
 f capacitors will be presented on sample cases.
LOCATION:ELL 116 https://plan.epfl.ch/?room==ELL%20116
STATUS:CONFIRMED
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