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SUMMARY:Towards elevated-temperature (>2 K) monolithic quantum computing p
 rocessors in production FDSOI CMOS technology
DTSTART:20200525T121500
DTEND:20200525T130000
DTSTAMP:20260407T050935Z
UID:278da7f634cda8a496a21e0262e903c573c3ef3eb17e9633d8c79e3f
CATEGORIES:Conferences - Seminars
DESCRIPTION:Prof. Dr. Sorin Voinigescu\nUniversity of Toronto\nInstitute o
 f Microengineering - Distinguished Lecture\n\nDue to the covid-19 restrict
 ions currently in place\, the lecture will take place remotely by zoom onl
 y.\n\nZoom Live Stream: https://epfl.zoom.us/j/682338354\n\nAbstract: Univ
 ersal quantum processors (QPs) “can now perform computations in a Hilber
 t space of dimension 253 ≈ 9 × 1015\, beyond the reach of the fastest c
 lassical supercomputers available today.” Despite reaching this crucial 
 milestone\, they remain expensive\, difficult-to-scale\, room-size\, labor
 atory devices that operate at extremely low temperature\, require many hou
 rs of tweaking before use\, and can only run simple quantum algorithms of 
 limited practical use. Their core building block\, the qubit\, is based on
  exotic superconducting Josephson-junction technology and is controlled by
  racks of electronic equipment connected through long coaxial cables. For 
 the next phase of QP development where real-world problems can be solved\,
  solutions must be found to ensure QP (i) scalability to millions of qubit
 s\, (ii) high fidelity (accuracy)\, (iii) reliability\, (iv) low-cost\, lo
 w-variability\, high-yield volume manufacturing\, and (v) ease and speed o
 f testability.\nTo address the scalability\, reliability\, and manufacturi
 ng challenges\, we propose to use the minimum-size transistor of productio
 n CMOS technology as the quantum processor qubit. This was not possible in
  the past due to large transistor dimensions but has become feasible in 22
 nm (Fully-Depleted Silicon on Insulator) FDSOI CMOS. The prospect of cheap
  quantum information processing in “plain old CMOS” is potentially rev
 olutionary\, since most other alternative proposals require fairly exotic 
 technologies that lack scalability\, high yield\, reliability and low vari
 ability\, and are difficult to interface with classical processors. It tak
 es advantage of the the natural progression of Moore's law to nanoscale di
 mensions and the transition from classical to quantum MOSFET behaviour.\nT
 his presentation will discuss the fundamental concepts and the feasibility
  of high-temperature (2-12 K) quantum processors\, based on heterostructur
 e Si1-xGex/Si1-yGey hole-spin qubits\, monolithically integrated with cont
 rol and readout electronics in commercial 22nm FDSOI CMOS technology. Thes
 e temperatures\, while still low\, are 100 times higher than those of curr
 ent competing quantum processors. Operation temperature is important becau
 se the QP is placed in a cryostat whose thermal lift (capacity to remove h
 eat) increases exponentially with temperature.  Monolithic integration im
 proves quantum processor fidelity\, allows for scalability and ease of tes
 tability\, reduces power consumption and cost\, and improves manufacturabi
 lity\, yield and reliability.\nThe beneficial aspects of the SiGe channel 
 hole-spin qubit will be emphasized in comparison with its silicon-only ele
 ctron-spin counterpart. It will also be shown that\, at 2-12 K\, MOSFETs a
 nd cascodes can be operated as quantum dots in the subthreshold region\, w
 hile behaving as classical MOSFETs and cascodes in the saturation region\,
  suitable for qubits and mm-wave mixed-signal processing circuits\, respec
 tively.\nIrrespective of the qubit technology\, the development of large q
 uantum processors is limited by the power consumption and associated heat 
 dissipation of the analog-mixed-signal control and readout electronics and
  by the challenge of interconnecting such a large number of qubits with th
 e control electronics. By developing elevated-temperature qubits\, the hea
 t dissipation constraints on the co-integrated or co-located control elect
 ronics and on the cryostat thermal lift are relieved\, thus allowing for t
 he integration of more complex quantum processors.\nHowever\, elevated-tem
 perature qubits require higher-frequency spin control electronics\, in the
  upper millimetre-wave and even THz frequency range. The design of low-pow
 er millimetre-wave spin manipulation electronic circuits will also be cove
 red.  Finally\, I will present measurements for full technology character
 ization at cryogenic temperatures up to 67 GHz and describe a methodology 
 for cryogenic mm-wave control electronics design based on room-temperature
  transistor models.\n\nBio: Sorin P. Voinigescu is a Professor  in the El
 ectrical and Computer Engineering Department at the University of Toronto 
 where he holds the Stanley Ho Chair in Microelectronics and is the Directo
 r of the VLSI Research Group. He is an IEEE Fellow and an expert on millim
 eter-wave and 100+Gb/s integrated circuits and atomic-scale semiconductor 
 device technologies. He obtained his  PhD degree in Electrical and Comput
 er Engineering from the University of Toronto in 1994 and his  M.Sc Degre
 e in Electronics and Telecommunications from the Politechnical Institute o
 f Bucharest in 1984.\n\nNote: The Seminar Series is eligible for ECTS cred
 its in the EDMI doctoral program\n\nNote: After the lecture\, there will b
 e time for discussion and interaction with the distinguished speaker\, san
 dwich lunch and refreshments sponsored by the Institute of Microengineerin
 g will be provided for attendees in front of the lecture hall (BM 5104\, c
 a. 13h15)
LOCATION:Online Only https://epfl.zoom.us/j/682338354
STATUS:CONFIRMED
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