Digital Enhancement of Pipelined ADCs and Fractional-N PLLs

Thumbnail

Event details

Date 30.06.2009
Hour 17:15
Speaker Prof. Ian Galton, UC San Diego, IEEE Distinguished Lecturer
Location
ELA2
Category Conferences - Seminars
The first talk will describe a pipelined ADC with two fully-integrated digital background calibration techniques, the second talk describes results which demonstrate that spurious tones in the output of a fractional-N PLL can be reduced by replacing the ΔΣ modulator with a new type of digital quantizer and adding a charge pump offset combined with a sampled loop filter.

Practical information

  • General public
  • Free

Event broadcasted in

Share