A Path to Achieving Sequential Correctness for Parallel Programs
Event details
| Date | 11.10.2013 |
| Hour | 14:00 › 15:30 |
| Speaker |
Satish Narayanasamy Bio: Satish Narayanasamy is an Assistant Professor in the EECS Department at the University of Michigan, where he joined in 2008. He has a Ph.D. in Computer Science from the University of California, San Diego. His research interests include computer architecture and software systems. His current focus is on improving the programmability and reliabilty of multiprocessors. He is the recipient of several awards including NSF CAREER, ASPLOS best paper, and IEEE Top Picks awards. |
| Location | |
| Category | Conferences - Seminars |
Parallel computers are becoming all pervasive from cell phones to data-centers. However, parallel programming continues to be a daunting task to this day even for experts. Even a semantics as fundamental as what value a load from shared-memory can return is poorly defined in popular concurrent languages like C++ and Java.
In this talk, I will discuss how by co-designing hardware, compiler and operating system we can solve some of the fundamental challenges in parallel programming. Specifically, I will present our ultra-low overhead solutions for supporting language-level sequential consistency semantics and some powerful tools for testing multi-threaded programs.
In this talk, I will discuss how by co-designing hardware, compiler and operating system we can solve some of the fundamental challenges in parallel programming. Specifically, I will present our ultra-low overhead solutions for supporting language-level sequential consistency semantics and some powerful tools for testing multi-threaded programs.
Practical information
- Informed public
- Free
Organizer
- Babak Falsafi
Contact
- Stéphanie Baillargues