Architecture Support for Fine-grained Parallelism

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Event details

Date 26.06.2024
Hour 13:0015:00
Speaker Jiawei Lin
Location
Category Conferences - Seminars
EDIC candidacy exam
Exam president: Prof. Paolo Ienne
Thesis advisor: Prof. Thomas Bourgeat
Co-examiner: Prof. Caglar Gulcehre

Abstract
The rapid evolution of computing demands has driven the need for more efficient and versatile processing frameworks. Modern applications such as machine learning, gaming, and real-time data processing can be accelerated by GPUs and domain-specific accelerators. However, irregular applications, such as Graph Neural Networks (GNNs), remain challenging to accelerate due to workload imbalances and the need for fine-grained parallelism.
This paper explores enhancements to the Simultaneous and Heterogeneous Multi-threading (SHMT) framework to address these challenges. We propose integrating dynamic parallelism capabilities and an efficient on-chip synchronization mechanism. Our enhanced SHMT framework aims to improve resource utilization and overall system efficiency, offering better support for fine-grained and dynamic parallel computations.

Background papers
  1. Can Dataflow Subsume Von Neumann Computing? https://ieeexplore.ieee.org/document/714561
  2. Simultaneous and Heterogenous Multithreading https://dl.acm.org/doi/10.1145/3613424.3614285
  3. MaxK-GNN: Extremely Fast GPU Kernel Design for Accelerating Graph Neural Networks Training https://dl.acm.org/doi/10.1145/3620665.3640426

Practical information

  • General public
  • Free

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EDIC candidacy exam

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