Formally Verifying the Performance of Concurrent Systems


Event details

Date 24.08.2022 13:0015:00  
Speaker Can Cebeci
Category Conferences - Seminars
EDIC candidacy exam
Exam president: Prof. James Larus
Thesis advisor: Prof. George Candea
Co-examiner: Prof. Sanidhya Kashyap

My current goal is to design a set of abstractions to serve as a performance interface for synchronization primitives, succinctly yet accurately summarizing their performance behavior, akin to how semantic interfaces summarize functionality. These summaries would then help developers of multithreaded applications choose which synchronization mechanism to use, identify performance bugs, and reason about the end-to-end performance. As the overarching goal of my thesis, I aim to design abstractions and methodologies to formally reason about the performance of concurrent systems.

Background papers

Practical information

  • General public
  • Free


EDIC candidacy exam