Formally Verifying the Performance of Concurrent Systems
Event details
| Date | 24.08.2022 |
| Hour | 13:00 › 15:00 |
| Speaker | Can Cebeci |
| Location | |
| Category | Conferences - Seminars |
EDIC candidacy exam
Exam president: Prof. James Larus
Thesis advisor: Prof. George Candea
Co-examiner: Prof. Sanidhya Kashyap
Abstract
My current goal is to design a set of abstractions to serve as a performance interface for synchronization primitives, succinctly yet accurately summarizing their performance behavior, akin to how semantic interfaces summarize functionality. These summaries would then help developers of multithreaded applications choose which synchronization mechanism to use, identify performance bugs, and reason about the end-to-end performance. As the overarching goal of my thesis, I aim to design abstractions and methodologies to formally reason about the performance of concurrent systems.
Background papers
Exam president: Prof. James Larus
Thesis advisor: Prof. George Candea
Co-examiner: Prof. Sanidhya Kashyap
Abstract
My current goal is to design a set of abstractions to serve as a performance interface for synchronization primitives, succinctly yet accurately summarizing their performance behavior, akin to how semantic interfaces summarize functionality. These summaries would then help developers of multithreaded applications choose which synchronization mechanism to use, identify performance bugs, and reason about the end-to-end performance. As the overarching goal of my thesis, I aim to design abstractions and methodologies to formally reason about the performance of concurrent systems.
Background papers
- Non-scalable locks are dangerous, Boyd-Wickizer et al., 2012.
- Everything you always wanted to know about synchronization but were afraid to ask, David et al., 2013.
- The Scalable Commutativity Rule: Designing Scalable Software for Multicore Processors, Clements et al, 2015.
Practical information
- General public
- Free