The Hardware Acceleration Renaissance
Event details
| Date | 11.07.2018 |
| Hour | 10:00 › 12:00 |
| Speaker | Sahand Kashani-Akhavan |
| Location | |
| Category | Conferences - Seminars |
EDIC candidacy exam
Exam president: Prof. Paolo Ienne
Thesis advisor: Prof. James Larus
Co-examiner: Prof. Edouard Bugnion
Abstract
Improving the cost, energy, and performance of our computing infrastructure has become increasingly challenging since the demise of Moore's law and Dennard scaling. The industry is in need of innovation as general-purpose processors now experience an annual performance increase of only 2-10\%, far less than the growth rate of data we ask them to process. In response to these challenges, many startups and even industry giants have started to develop hardware accelerators to bridge this performance gap and obtain multi-fold speedups on their specific workloads. This report presents two datacenter-scale deployment studies of such devices as well as the design of a standalone accelerator for a bioinformatics application.
Background papers
Darwin: A Genomics Co-processor Provides up to 15,000X Acceleration on Long Read Assembly, by Turakhia Y. et al.
In-Datacenter Performance Analysis of a Tensor Processing Unit, by Jouppi N., et al.
A cloud-scale acceleration architecture, by Caulfield A. et al.
Exam president: Prof. Paolo Ienne
Thesis advisor: Prof. James Larus
Co-examiner: Prof. Edouard Bugnion
Abstract
Improving the cost, energy, and performance of our computing infrastructure has become increasingly challenging since the demise of Moore's law and Dennard scaling. The industry is in need of innovation as general-purpose processors now experience an annual performance increase of only 2-10\%, far less than the growth rate of data we ask them to process. In response to these challenges, many startups and even industry giants have started to develop hardware accelerators to bridge this performance gap and obtain multi-fold speedups on their specific workloads. This report presents two datacenter-scale deployment studies of such devices as well as the design of a standalone accelerator for a bioinformatics application.
Background papers
Darwin: A Genomics Co-processor Provides up to 15,000X Acceleration on Long Read Assembly, by Turakhia Y. et al.
In-Datacenter Performance Analysis of a Tensor Processing Unit, by Jouppi N., et al.
A cloud-scale acceleration architecture, by Caulfield A. et al.
Practical information
- General public
- Free
Contact
- EDIC - [email protected]