System Seminars - Title : FlashTier: A Lightweight, Consistent and Durable Storage Cache
Event details
| Date | 16.04.2012 |
| Hour | 13:00 › 14:30 |
| Speaker | Mohit Saxena |
| Location | |
| Category | Conferences - Seminars |
Abstract :
The availability of high-speed solid-state storage has introduced a new tier into the storage hierarchy. Low-latency and high-IOPS solid-state drives (SSDs) cache data in front of high-capacity disks. However, most existing SSDs are designed to be a drop-in disk replacement, and hence are mismatched for use as a cache.
This work describes FlashTier, a system architecture built upon solid-state cache (SSC), a flash device with an interface designed for caching. Management software at the operating system block layer directs caching. The FlashTier design addresses three limitations of using traditional SSDs for caching. First, FlashTier provides a unified logical address space to reduce the cost of cache block management within both the OS and the SSD. Second, FlashTier provides cache consistency guarantees allowing the cached data to be used following a crash. Finally, FlashTier leverages cache behavior to silently evict data blocks during garbage collection to improve performance of the SSC.
We have implemented an SSC simulator and a cache manager in Linux. In trace-based experiments, we show that FlashTier reduces address translation space by 60% and silent eviction improves performance by up to 167%. Furthermore, FlashTier can recover from the crash of a 100GB cache in only 2.4 seconds.
Bio :
Mohit Saxena is a PhD candidate at the Computer Sciences department, University of Wisconsin-Madison. His research interests lie in operating systems and storage, with current focus on new interfaces for flash and non-volatile memory technologies. In the past, he has investigated different memory abstractions within the OS to use flash SSDs -- as a cheap medium to virtualize expensive main memory, a durable medium to persist volatile main memory, and a fast medium to cache slow disk storage. Before joining Wisconsin, he graduated with MS from Purdue University and B.Tech. from Indian Institute of Technology (IIT-Delhi) in Computer Sciences.
The availability of high-speed solid-state storage has introduced a new tier into the storage hierarchy. Low-latency and high-IOPS solid-state drives (SSDs) cache data in front of high-capacity disks. However, most existing SSDs are designed to be a drop-in disk replacement, and hence are mismatched for use as a cache.
This work describes FlashTier, a system architecture built upon solid-state cache (SSC), a flash device with an interface designed for caching. Management software at the operating system block layer directs caching. The FlashTier design addresses three limitations of using traditional SSDs for caching. First, FlashTier provides a unified logical address space to reduce the cost of cache block management within both the OS and the SSD. Second, FlashTier provides cache consistency guarantees allowing the cached data to be used following a crash. Finally, FlashTier leverages cache behavior to silently evict data blocks during garbage collection to improve performance of the SSC.
We have implemented an SSC simulator and a cache manager in Linux. In trace-based experiments, we show that FlashTier reduces address translation space by 60% and silent eviction improves performance by up to 167%. Furthermore, FlashTier can recover from the crash of a 100GB cache in only 2.4 seconds.
Bio :
Mohit Saxena is a PhD candidate at the Computer Sciences department, University of Wisconsin-Madison. His research interests lie in operating systems and storage, with current focus on new interfaces for flash and non-volatile memory technologies. In the past, he has investigated different memory abstractions within the OS to use flash SSDs -- as a cheap medium to virtualize expensive main memory, a durable medium to persist volatile main memory, and a fast medium to cache slow disk storage. Before joining Wisconsin, he graduated with MS from Purdue University and B.Tech. from Indian Institute of Technology (IIT-Delhi) in Computer Sciences.
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