A vertical, cross-layered approach to building low-latency applications

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Event details

Date 27.05.2016
Hour 10:3012:30
Speaker Marios Kogias
Location
Category Conferences - Seminars
EDIC Candidacy Exam:
Exam president:  Prof. Willy Zwaenepoel
Thesis Director: Prof. Christos Kozyrakis
Thesis co-director: Prof. Edouard Bugnion
Co-examiner: Prof. James Larus

Background papers:
MICA: A Holistic Approach to Fast In-Memory Key-Value Storage
IX: A Protected Dataplane Operating System for High Throughput and Low Latency
Decentralized Task-Aware Scheduling for Data Centre Networks

Abstract:
Building and deploying applications with strict latency service level objectives in the scale of microseconds requires a holistic approach that includes the application itself, the operating system and the underlying networking infrastructure. In this proposal I try to identify the main causes of latency variability that lead to tail-latency and I present three systems that tackle the low-latency challenge from a different perspective. MICA is a low-latency application that introduces application specific optimizations. IX is a dataplane operating system, while Barat introduces a low-latency perspective in networking. Finally, understanding the challenge of performance-debugging latency-critical applications and the lack of equivalent tooling, I propose my research topic that is related to tools and methodologies around low-latency measurement.

Practical information

  • General public
  • Free

Contact

  • Cecilia Chapuis EDIC

Tags

EDIC candidacy exam

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