ABC: Industrial-Strength Academic Tool for Logic Synthesis and Formal Verification
Event details
| Date | 07.03.2012 |
| Hour | 16:45 |
| Speaker | Alan Mishchenko, University of California, Berkeley |
| Location |
INF328
|
| Category | Conferences - Seminars |
This talk summarizes a decade of working for industry in academia as part of Berkeley Verification and Synthesis Research Center (BVSRC) at UC Berkeley, where we are developing a public-domain system for logic synthesis and formal verification called ABC, which is widely used by both design houses and CAD tool companies. ABC combines scalable logic transformations based on And-Inverter Graphs (AIGs), with a variety of innovative algorithms, implemented with attention to detail such as runtime and memory usage, resulting in the industrial-strength code. Recognizing and exploiting synergy of sequential synthesis and sequential verification leads to improvements in both domains.
Practical information
- General public
- Registration required
Organizer
- Anil Leblebici
Contact
- Anil Leblebici