Emerging Electronic Devices for Energy Efficient Computing
This seminar will review state-of-the-art energy efficient computing device principles (Band-To-Band-Tunneling - BTBT, Negative Capacitance, Nano-Electro-Mechanical - NEM switching) and performances, with main emphasis on tunnel FETs. At device level we will discuss some of the important challenges for tunnel FETs such as: (i) selection of the material system and band-gap engineering of heterostructure Tunnel FETs to simultaneously offer best performance trade-off for operation below 0.3V, (ii) optimized device design (field aligned to the tunneling path, super-linear onset, minimization of Miller effect), (iii) understanding the role of defects for efficient BTBT, (iv) controlling parameter sensitivity and variability, and, (v) advanced modeling of heterojunction tunnel FETs.
A future Density-of-State switch candidate for sub-0.1V operation exploiting tunneling through a bias-induced electron-hole bilayer (called Electron-Hole Bilayer Tunnel FET) will be investigated and discussed based on a calibrated quantum-mechanical simulator. We will present performance projections for sub-0.3V EHBTFET complementary logic compared to CMOS logic.
Overall, the paper will demonstrate that Tunnel FETs stand as the most promising steep slope switch candidates to reduce the supply voltage below 0.3 V and offer significant power dissipation savings for digital computing.
Bio: Adrian M. Ionescu is Full Professor at the Swiss Federal Institute of Technology, Lausanne, Switzerland. He received the B.S./M.S. and Ph.D. degrees from the Polytechnic Institute of Bucharest, Romania and the National Polytechnic Institute of Grenoble, France, in 1989 and 1997, respectively. He has held staff and/or visiting positions at LETI-CEA, Grenoble, France and INP Grenoble, France and Stanford University, USA, in 1998 and 1999.
Dr. Ionescu has published more than 400 articles in international journals and conferences. He received many Best Paper Awards in international conferences, the Annual Award of the Technical Section of the Romanian Academy of Sciences in 1994 and the Blondel Medal in 2009 for remarkable contributions to the progress in engineering sciences in the domain of electronics. He is the 2013 recipient of the IBM Faculty Award in Engineering. He served the IEDM and VLSI conference technical committees and was the Technical Program Committee (Co)Chair of ESSDERC in 2006 and 2013.
He is director of the Laboratory of Micro/Nanoelectronic Devices (NANOLAB). He is appointed as national representative of Switzerland for the European Nanoelectronics Initiative Advisory Council (ENIAC) and member of the Scientific Committee of CATRENE. Dr. Ionescu is the European Chapter Chair of the ITRS Emerging Research Devices Working Group.
A future Density-of-State switch candidate for sub-0.1V operation exploiting tunneling through a bias-induced electron-hole bilayer (called Electron-Hole Bilayer Tunnel FET) will be investigated and discussed based on a calibrated quantum-mechanical simulator. We will present performance projections for sub-0.3V EHBTFET complementary logic compared to CMOS logic.
Overall, the paper will demonstrate that Tunnel FETs stand as the most promising steep slope switch candidates to reduce the supply voltage below 0.3 V and offer significant power dissipation savings for digital computing.
Bio: Adrian M. Ionescu is Full Professor at the Swiss Federal Institute of Technology, Lausanne, Switzerland. He received the B.S./M.S. and Ph.D. degrees from the Polytechnic Institute of Bucharest, Romania and the National Polytechnic Institute of Grenoble, France, in 1989 and 1997, respectively. He has held staff and/or visiting positions at LETI-CEA, Grenoble, France and INP Grenoble, France and Stanford University, USA, in 1998 and 1999.
Dr. Ionescu has published more than 400 articles in international journals and conferences. He received many Best Paper Awards in international conferences, the Annual Award of the Technical Section of the Romanian Academy of Sciences in 1994 and the Blondel Medal in 2009 for remarkable contributions to the progress in engineering sciences in the domain of electronics. He is the 2013 recipient of the IBM Faculty Award in Engineering. He served the IEDM and VLSI conference technical committees and was the Technical Program Committee (Co)Chair of ESSDERC in 2006 and 2013.
He is director of the Laboratory of Micro/Nanoelectronic Devices (NANOLAB). He is appointed as national representative of Switzerland for the European Nanoelectronics Initiative Advisory Council (ENIAC) and member of the Scientific Committee of CATRENE. Dr. Ionescu is the European Chapter Chair of the ITRS Emerging Research Devices Working Group.
Practical information
- Informed public
- Free
Organizer
- ICMP (Arnaud Magrez and Raphael Butté)
Contact
- Arnaud Magrez