IEM Seminar: Scalable Analog Computing Through Circuit–Architecture Co-Design
Abstract
The rapid growth of edge computing and near-sensor intelligence is driving the need for platforms that are both energy-efficient and fundamentally scalable under tight power, bandwidth, and latency constraints. This talk presents a research vision for scalable analog computing, where computation, communication, and circuit methodology are co-designed to overcome the traditional limitations associated with the analog systems.
The presentation is focused on three tightly coupled dimensions of scalability. First, large-scale analog computing architectures for applications such as neural networks are explored, with emphasis placed on approaches that improve density, robustness, and efficiency. Second, high-bandwidth die-to-die communication is examined as a key enabler for scaling beyond a single die and emerging signaling techniques that enhance bandwidth density and energy efficiency are highlighted. Third, high-speed, energy-efficient analog building blocks are presented, and it is shown how the novel circuit design methodology developed within our team can be used to enable systematic circuit optimization across a wide design space.
Together, these directions illustrate how circuit–architecture co-design can enable scalable, energy-efficient analog and mixed-signal systems for data-centric applications in advanced technologies.
Bio
Armin Tajalli is an Associate Professor in the Department of Electrical and Computer Engineering at the University of Utah. He received his Ph.D. from the École Polytechnique Fédérale de Lausanne (EPFL), where he subsequently completed a postdoctoral appointment at the Algorithmic Mathematics Laboratory within the School of Computer and Communication Sciences. Dr. Tajalli was part of the team who started Kandou AI, where he has since led advanced research and development activities. He has authored more than 90 scientific publications and holds over 40 patents. His distinctions include the IEEE AMD/CICC Student Scholarship (2009), the PhD Prime Award at EPFL (2010), and the Best Paper Award at DesignCon (2016). He currently serves as a Technical Program Committee member for IEEE CICC, ESSCIRC, and DATE Conferences, and was an Associate Editor of the IEEE Transactions on VLSI Systems.
The rapid growth of edge computing and near-sensor intelligence is driving the need for platforms that are both energy-efficient and fundamentally scalable under tight power, bandwidth, and latency constraints. This talk presents a research vision for scalable analog computing, where computation, communication, and circuit methodology are co-designed to overcome the traditional limitations associated with the analog systems.
The presentation is focused on three tightly coupled dimensions of scalability. First, large-scale analog computing architectures for applications such as neural networks are explored, with emphasis placed on approaches that improve density, robustness, and efficiency. Second, high-bandwidth die-to-die communication is examined as a key enabler for scaling beyond a single die and emerging signaling techniques that enhance bandwidth density and energy efficiency are highlighted. Third, high-speed, energy-efficient analog building blocks are presented, and it is shown how the novel circuit design methodology developed within our team can be used to enable systematic circuit optimization across a wide design space.
Together, these directions illustrate how circuit–architecture co-design can enable scalable, energy-efficient analog and mixed-signal systems for data-centric applications in advanced technologies.
Bio
Armin Tajalli is an Associate Professor in the Department of Electrical and Computer Engineering at the University of Utah. He received his Ph.D. from the École Polytechnique Fédérale de Lausanne (EPFL), where he subsequently completed a postdoctoral appointment at the Algorithmic Mathematics Laboratory within the School of Computer and Communication Sciences. Dr. Tajalli was part of the team who started Kandou AI, where he has since led advanced research and development activities. He has authored more than 90 scientific publications and holds over 40 patents. His distinctions include the IEEE AMD/CICC Student Scholarship (2009), the PhD Prime Award at EPFL (2010), and the Best Paper Award at DesignCon (2016). He currently serves as a Technical Program Committee member for IEEE CICC, ESSCIRC, and DATE Conferences, and was an Associate Editor of the IEEE Transactions on VLSI Systems.
Practical information
- General public
- Free
Contact
- Suzanne Manné