Leveraging FPGA Reconfigurability during Post-Silicon Debug and Validation: Opportunities, Successes, and Challenges

Event details
Date | 11.06.2013 |
Hour | 11:15 › 12:15 |
Speaker | Prof. Steve Wilton, University of British Columbia |
Location | |
Category | Conferences - Seminars |
Electronic devices have come to permeate every aspect of our daily lives. At the heart of these devices are Integrated Circuits. State-of-the-art chips can now contain several billion transistors; designing and verifying that these circuits function correctly under all expected (and unexpected) operation conditions is extremely challenging. While simulation is an important tool, it is not sufficient; simulation is slow, and it is increasingly important to be able to debug circuits in-situ. Debugging fabricated chips, post-silicon, is the only solution to ensure working systems.
An emerging tool in improving the debug experience is the use of Field-Programmable Gate Array (FPGA) technology. In this talk, we will focus on two ways FPGA-like technology can be used to accelerate post-silicon debug. First, we will show how debug productivity can be enhanced by embedding small reconfigurable logic analyzers on chip, and using these to not only record traces, but intelligently process data to control the system and make better use of existing on-chip trace storage. Challenges include minimizing the overhead while providing enough flexibility to support many debug scenarios.
Second, we will discuss how the reconfigurable nature of FPGAs can be used to efficiently provide observability while debugging in an FPGA prototyping environment. In particular, we will show how we can create flexible overlay networks that provide connectivity between trace buffers and the circuit under test using unused FPGA routing resources. We will show that this technique effectively results in no area and speed overhead to the circuit under test, yet provides a significantly improved debug experience.
An emerging tool in improving the debug experience is the use of Field-Programmable Gate Array (FPGA) technology. In this talk, we will focus on two ways FPGA-like technology can be used to accelerate post-silicon debug. First, we will show how debug productivity can be enhanced by embedding small reconfigurable logic analyzers on chip, and using these to not only record traces, but intelligently process data to control the system and make better use of existing on-chip trace storage. Challenges include minimizing the overhead while providing enough flexibility to support many debug scenarios.
Second, we will discuss how the reconfigurable nature of FPGAs can be used to efficiently provide observability while debugging in an FPGA prototyping environment. In particular, we will show how we can create flexible overlay networks that provide connectivity between trace buffers and the circuit under test using unused FPGA routing resources. We will show that this technique effectively results in no area and speed overhead to the circuit under test, yet provides a significantly improved debug experience.
Links
Practical information
- General public
- Free
Organizer
- SuRI 2013
Contact
- Simone Muller