Logic Synthesis for Tunable Polarity FETs

Event details
Date | 11.09.2012 |
Hour | 11:00 |
Speaker | Mr. Luca Gaetano Amarù |
Location | |
Category | Conferences - Seminars |
EDIC Candidacy Exam:
Exam president: Prof. Yusuf Leblebici
Thesis director: Prof. Giovanni de Micheli
Thesis co-director: Prof. Andreas Burg
Co-examiner: Prof. David Atienza
Research Proposal
An Efficient Gate Library for Ambipolar CNTFET Logic by Ben-Jamaa, M.H., K. Mohanram and G. De Micheli.
Improving XOR-Dominated Circuits by Exploiting Dependencies between Operands by A.K. Verma and P. Ienne.
Technology Mapping for High-Performance Static CMOS and Pass Transistor Logic Designs by Y.Jiang, S.S. Sapatnekar and C.Bamjii.
Exam president: Prof. Yusuf Leblebici
Thesis director: Prof. Giovanni de Micheli
Thesis co-director: Prof. Andreas Burg
Co-examiner: Prof. David Atienza
Research Proposal
An Efficient Gate Library for Ambipolar CNTFET Logic by Ben-Jamaa, M.H., K. Mohanram and G. De Micheli.
Improving XOR-Dominated Circuits by Exploiting Dependencies between Operands by A.K. Verma and P. Ienne.
Technology Mapping for High-Performance Static CMOS and Pass Transistor Logic Designs by Y.Jiang, S.S. Sapatnekar and C.Bamjii.
Practical information
- General public
- Free
Contact
- Evelyn Duperrex