EE Distinguished Speakers Seminar: VLSI Sensors and Security
Event details
| Date | 18.10.2019 |
| Hour | 13:15 › 14:15 |
| Speaker | Wayne Burleson has been a Professor of Electrical and Computer Engineering at the University of Massachusetts Amherst since 1990. From 2012-2017 he was also Senior Fellow at AMD Research in Boston working on power optimization, especially for supercomputing under the DOE FastForward and DesignForward programs. He has degrees from MIT and the University of Colorado. He has worked as a custom chip designer and consultant in the semiconductor industry with VLSI Technology, DEC, Compaq/HP, Intel, Rambus and AMD. Wayne was a visiting professor at ENST Paris in 1996/97, at LIRM Montpellier in 2003 and at EPFL Switzerland in 2010/11. His research is in the general area of VLSI, including circuits and CAD for low-power, long interconnects, clocking, reliability, thermal effects, process variation and noise mitigation. He also conducts research in hardware security, reconfigurable computing, content-adaptive signal processing, RFID and multimedia instructional technologies. He teaches courses in VLSI Design, Embedded Systems and Security Engineering. Wayne has published over 200 refereed publications in these areas and is a Fellow of the IEEE for contributions in integrated circuit design and signal processing. |
| Location | |
| Category | Conferences - Seminars |
Abstract: Very Large Scale integrated circuits use multiple levels of abstraction to hide physical behavior beneath a digital façade. In particular, manufacturing process variations, aging effects, voltage noise and thermal variations, must be modeled at design time and managed at run-time in order to provide efficient and reliable computation. These effects are all increasing as CMOS technology advances, and are present in most post-CMOS technologies as well. These same physical variations can be used as sources of entropy and unique identifiers to provide a foundation of trust to support higher level security protocols. This talk will introduce a variety of on-chip sensors in both custom CMOS and FPGA technologies that use statistical techniques to measure various physical quantities at very fine-grain spatial and temporal granularity. New circuits will be shown to securely deliver random numbers and chip identifiers even in the presence of powerful adversaries. A proposal for “secret-free” cryptography based on hardware will also be explored which protects against an even stronger threat model. Finally, a new undergraduate lab course in Security Engineering will be presented, showing how VLSI and embedded system design can be taught in the context of an intelligent adversary.
Practical information
- General public
- Free
Organizer
- Prof. Elison Matioli
Contact
- [email protected] / +4121 69 33721